ENGINEERING CHANGE ORDER



        ECO NUMBER:     0011
        DATE:           2023-12-13
        BOARD NAME:     R65X1Q SBC
        BOARD REVISION: PRODUCTION 1 AND EARLIER


        PORT D Pin Ordering
        -------------------

        The  schematic  for the R65X1Q SBC, production revision 1 and earlier,
        contains an error in the pin designations  for  PORT  D.   All  signal
        labels for PORT D are reversed; that is, the PD0 label connects to PD7
        (pin 5) on the processor, with the  reversal  continuing  through  PD7
        label  which connects to PD0 (pin 62) on the processor.  This error is
        a result of inconsistent ordering on the processor schematic symbol.

        No etch changes are required, but the original schematic is confusing.
        Existing  copies  should  be  updated or replaced.  The correct PORT D
        pinout for all R65X1Q SBC revisions is as follows:

            SIGNAL   #     #   SIGNAL
           ---------------------------
               PD7   1 o o 2   PD6
               PD5   3 o o 4   PD4
               PD3   5 o o 6   PD2
               PD1   7 o o 8   PD0
               GND   9 o o 10  GND

        This error has been corrected in the  schematic  It  does  not  affect
        labeling on the R65X1Q prototype board.